Intel's Client Graphics and AI (CGAI) NPU IP team is looking for a Digital Design Hardware Engineer to develop leading edge logic design's for Intel's Neural Processing Unit (NPU) Artificial Intelligence (AI) accelerator products.
In this role you will join the NPUHardware team working closely with multiple internal SoC partners, Hardware Validation Engineers and AI architects to define and drive the development of key AI Hardware Intellectual Property.
Your responsibilities will include:
Responsible for the logic implementation of complex design block(s) using RTL coding techniques
Responsible for RTL quality signoff activities such as LINT and CDC checking
Working with pre-Silicon validation engineers to develop cluster level directed/random tests and environments
Working with the Physical Design (Layout) team on Synthesis, Formal Verification and Timing Convergence
Working with FPGA and Emulation teams on early design bring-up to enable SW development.
Educational Requirement:
Hons. Bachelors/Masters in Electronic Engineering /Computer Science or equivalent.
Minimum Qualifications:
A self-starter with the ability to manage your own time effectively
Ability to work well in a diverse team environment
Exposure to RTL level Digital Design.
Preferred Requirements:
1 to 5 years of direct industry experience or internship experience is applicable
A background in RTL level Digital IC Design using System Verilog and/or Verilog ASIC and/or SoC design experience
Experience in unit level validation environment development, test plan generation and test case implementation for the verification of design block(s)
Experience with industry standard development tools and methodologies Experience with languages such as SystemC, C++, Perl, TCL, Shell scripting, Python, System-Verilog
Experience with SoC based CPUs, NoCs, AMBA Protocols, Memory controllers
Experience with online collaboration tools.
Leixlip is the primary location for this position. In addition, we are happy to support flexible work/life balance arrangements.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.