Minimum qualifications:
- Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
- 5 years of experience with Physical Design.
- Experience with Python or C++.
- Experience with Machine Learning.
Preferred qualifications:
- 10 years of experience in Synthesis and Physical Design.
- Experience and knowledge in various machine learning algorithms from logistic regression to neural networks and reinforcement learning.
- Understanding of algorithms and data structures.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Machine Learning Engineer for the Google Silicon organization, you will contribute to improving SoC Performance, Power, and Area (PPA) using machine learning techniques. You will apply your expertise to solve technical challenges and drive improvements in Power, Performance, Area, and Schedule. Your work will directly impact logic design and optimization, floorplanning, place and route, clock and power planning, timing analysis, Power Delivery Network (PDN) analysis, and more. You will collaborate across Alphabet, working with design, CAD, and machine learning teams.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Deploy Google’s AI solutions into chip design, collaborating with internal teams, Google DeepMind, and other teams within Google to explore and apply solutions that improve chip design PPA or reduce cycle time.
