About us 

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption.  

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. 

Job Summary 

Working within the logical design team, the silicon logical designer is responsible for a wide range of logical design tasks working closely with other engineers within the Silicon department. This person is responsible for helping the team deliver high quality micro-architecture and RTL for Graphcore chips, working within the logical design team and the rest of the silicon teams to ensure that the silicon team can meet the company objectives for silicon delivery.  

The Team 

The logical design team sits within the Silicon design team. We are responsible for delivering the Microarchitecture and RTL design to implement the chip architecture specification for Graphcore Silicon. 

Responsibilities and Duties 

• Being part of the logical team producing high quality microarchitecture and RTL for Graphcore chips. 
• Ensuring good communication between sites  
• Contributing to shared design infrastructure and flows. 
• Using EDA tools and the Graphcore design flow to design in cutting edge technologies  
• Leading and/or contributing to final chip level checks and auditing  
• Providing feedback to Physical Design, Verification and DFT teams  

Candidate Profile 

Essential:

• logical design experience in relevant industry  
• Be highly motivated, a self-starter, and a team player  
• Ability to work across teams and debugging issues seen to find root causes  
• Ability to research along with the knowledge to solve complex problems 
• Presents technical and functional knowledge to design experiments/ projects that contribute to overall direction of team 
• Exercises independent judgment in developing methods, techniques and evaluation criteria for obtaining results 
• Highly influential on colleagues with ability to explain difficult concepts 
• Degree in Computer Science, Engineering or related subject  
• Ability to program, required to solve design issues, e.g. Python, Tcl   
• SystemVerilog 
• Knowledge of digital design flows  
• 12 – 14 years-experience in engineering background 

Desirable: 

• Processor design,  
• Application specific blocks 
• High-speed serial interfaces 
• Complex third-party IP integration 
• Experience managing teams   
• Arithmetic pipeline design 
• Floating-point design 
• Design for test 
• Synthesis  
• Timing Analysis  
• Logical Equivalence   
• Project Planning  
• Power Integrity   
• Silicon transistor knowledge  
• Design for test